A Bio-inspired Redundant Sensing Architecture
Authors: Anh Tuan Nguyen, Jian Xu, Zhi Yang
NeurIPS 2016 | Conference PDF | Archive PDF | Plain Text | LLM Run Details
| Reproducibility Variable | Result | LLM Response |
|---|---|---|
| Research Type | Experimental | Through Monte Carlo simulation with the error probabilistic distribution as a priori, the performance approaching the Shannon limit is feasible. In actual measurements without knowing the error distribution, we observe at least 2-bit extra precision. |
| Researcher Affiliation | Academia | Anh Tuan Nguyen, Jian Xu and Zhi Yang Department of Biomedical Engineering University of Minnesota Minneapolis, MN 55455 yang5029@umn.edu |
| Pseudocode | No | The paper describes algorithms but does not provide structured pseudocode or algorithm blocks. |
| Open Source Code | No | The paper does not provide concrete access to source code for the methodology described in this paper. |
| Open Datasets | No | The paper describes Monte Carlo simulations and measurements of an ADC, which do not typically involve publicly available datasets in the sense of labeled data collections for machine learning. The simulations use an 'error probabilistic distribution as a priori' and actual measurements are taken on a fabricated integrated circuit, not on a pre-existing dataset. |
| Dataset Splits | No | The paper does not provide specific dataset split information (exact percentages, sample counts, or detailed splitting methodology) for training, validation, or testing, as it describes circuit simulations and measurements rather than experiments on a dataset. |
| Hardware Specification | No | The paper describes the design and fabrication of a mixed-signal ADC integrated circuit using a 'CMOS process', but it does not specify the hardware (e.g., CPU, GPU, memory) used to run the Monte Carlo simulations or to control the measurement equipment for testing the fabricated chip. |
| Software Dependencies | No | The paper does not provide specific ancillary software details, such as library or solver names with version numbers, needed to replicate the experiment or simulation environment. |
| Experiment Setup | Yes | The ADC design is based on successive-approximation register (SAR) architecture and features redundant sensing with a geometrical identity 14 (13, 1). The component set SC is a binary-weighted capacitor array. We have chosen the smallest capacitance available in the CMOS process to implement the unit cell for reducing circuits power and area. The resolution of the secondary array is chosen as N1 = N0 - 1 to maximize the exchange capacity between two component sets. |