An Asynchronous Parallel Stochastic Coordinate Descent Algorithm
Authors: Ji Liu, Steve Wright, Christopher Re, Victor Bittorf, Srikrishna Sridhar
ICML 2014 | Conference PDF | Archive PDF | Plain Text | LLM Run Details
| Reproducibility Variable | Result | LLM Response |
|---|---|---|
| Research Type | Experimental | We describe results from implementation on 40-core processors. Computational experience is reported in Section 6. All our test problems have the form (1), with either Ω= Rn or Ωseparable as in (2). Our implementation of ASYSCD is called DIMMWITTED (or DW for short). Results are shown in Figures 1 for a variant of DW in which the indexes are reshuffled only every tenth epoch (p = 10). |
| Researcher Affiliation | Academia | Ji Liu JI-LIU@CS.WISC.EDU Stephen J. Wright SWRIGHT@CS.WISC.EDU Christopher R e CHRISMRE@STANFORD.EDU Victor Bittorf BITTORF@CS.WISC.EDU Srikrishna Sridhar SRIKRIS@CS.WISC.EDU Department of Computer Sciences, University of Wisconsin-Madison, 1210 W. Dayton St., Madison, WI 53706 Department of Computer Science, Stanford University, 353 Serra Mall, Stanford, CA 94305 |
| Pseudocode | Yes | Algorithm 1 Asynchronous Stochastic Coordinate Descent Algorithm |
| Open Source Code | No | The paper mentions its implementation "DIMMWITTED" and refers to another paper for details: "Please refer to Zhang & R e (2014) for more details about DW." However, it does not provide a direct link to the source code for the methodology described in *this* paper, nor does it explicitly state that the code is open-source or available. |
| Open Datasets | Yes | All datasets used in Table 3 except reuters were obtained from the LIBSVM dataset repository1. The dataset reuters is a sparse binary text classification dataset constructed as a one-versus-all version of Reuters-21592. 1http://www.csie.ntu.edu.tw/ cjlin/ libsvmtools/datasets/ 2http://www.daviddlewis.com/resources/ testcollections/reuters21578/ |
| Dataset Splits | No | The paper does not provide specific details about training, validation, or test dataset splits for the experiments. It describes how synthetic data is generated and mentions using established datasets like those from LIBSVM, but without specifying how they were partitioned for the experimental evaluation. |
| Hardware Specification | Yes | We describe results from implementation on 40-core processors. Our implementation, described in Section 6, is a little more complex than this simple model would suggest, as it is tailored to the architecture of the Intel Xeon machine that we use for experiments. It runs on various numbers of threads, from 1 to 40, each thread assigned to a single core in our 40-core Intel Xeon architecture. Cores on the Xeon architecture are arranged into four sockets ten cores per socket, with each socket having its own memory. |
| Software Dependencies | No | The paper does not provide specific version numbers for any software dependencies used in their implementation. It mentions using "LIBSVM" for comparison, but not as a dependency for their own method, and even for LIBSVM, no version is specified in the main text related to their implementation. |
| Experiment Setup | Yes | In Algorithm 1, we set the steplength parameter γ to 1, and we choose initial iterate to be x0 = 0. Our implementation of ASYSCD is called DIMMWITTED (or DW for short). We use the parameter p to denote the number of epochs that are executed between reordering (shuffling) of the coordinates of x. We investigate both shuffling after every epoch (p = 1) and after every tenth epoch (p = 10). For problem (24), with β = 5. |