Notice: The reproducibility variables underlying each score are classified using an automated LLM-based pipeline, validated against a manually labeled dataset. LLM-based classification introduces uncertainty and potential bias; scores should be interpreted as estimates. Full accuracy metrics and methodology are described in Coakley et alK. L. Coakley, T. Snelleman, H. Hoos, and O. E. Gundersen, "The embrace of open science: An analysis of a decade of AI research and 56 800 conference papers," Under Review, 2026..
High-Performance Arithmetic Circuit Optimization via Differentiable Architecture Search
Authors: Xilin Xia, Jie Wang, Wanbo Zhang, Zhihai Wang, Mingxuan Yuan, Jianye Hao, Feng Wu
NeurIPS 2025 | Venue PDF | LLM Run Details
| Reproducibility Variable | Result | LLM Response |
|---|---|---|
| Research Type | Experimental | We evaluate ARITH-DAS on a suite of representative arithmetic circuits, including multipliers and multiply-accumulate units. Experiments show substantial improvements over state-of-the-art L2O and conventional methods, achieving up to 27.05% gain in hypervolume of area-delay Pareto frontiers, a standard metric for evaluating multi-objective optimization performance. Moreover, integrating our optimized arithmetic units into large-scale AI accelerators yields up to 6.59% delay reduction, demonstrating both scalability and real-world applicability. |
| Researcher Affiliation | Collaboration | Xilin Xia1 Jie Wang1 Wanbo Zhang1 Zhihai Wang1 Mingxuan Yuan2 Jianye Hao2,3 Feng Wu1 1 Mo E Key Laboratory of Brain-inspired Intelligent Perception and Cognition, University of Science and Technology of China 2 Noahs Ark Lab, Huawei Technologies 3 College of Intelligence and Computing, Tianjin University |
| Pseudocode | No | The paper describes methods and formulations in sections like '4 Methodology' and its subsections, but it does not contain any explicitly labeled 'Pseudocode' or 'Algorithm' blocks, nor does it present structured steps in a code-like format. Listings 1 and 2 are configuration scripts, not algorithms. |
| Open Source Code | Yes | The code is available at https://github.com/MIRALab-USTC/Arith-DAS.git |
| Open Datasets | Yes | Logic synthesis is performed using Yosys [30] with the Nangate45 technology library [31], while static timing analysis (STA) is conducted through Open STA [29]...To assess the generalization capability of the optimized computing units, we integrate those produced by ARITH-DAS and baseline methods into six representative AI accelerator circuits from the Koios 2.0 benchmark [39]. |
| Dataset Splits | No | The paper describes an architecture search and optimization framework (ARITH-DAS) that generates and evaluates circuit designs. It leverages a PPO-inspired algorithm for training, where the 'data' (circuit designs) are generated and sampled during the optimization process, rather than being drawn from predefined training, validation, and test splits of a fixed dataset. The mention of 'randomly generate 10000 input samples' in Appendix C.2 refers to functional verification of generated circuits, not dataset splits for model training. |
| Hardware Specification | Yes | All experiments are executed on a computational platform with an Intel Xeon Gold 6246R CPU (3.60 GHz) and NVIDIA RTX 3090 GPU. |
| Software Dependencies | No | The paper mentions several software tools and libraries: Open ROAD [29], Yosys [30], Nangate45 technology library [31], Open STA [29, 69], Verilator [32], PyTorch [33], PyTorch Geometric [34], and Adam [35]. For baselines, Gurobi optimizer [75] is mentioned. However, specific version numbers for these software components are not provided in the text, which is required for a reproducible description of ancillary software. |
| Experiment Setup | Yes | The paper provides specific experimental setup details, including hyperparameters in Table 4: 'Learning rate 1e-4', 'Iterations 5000', 'GNN layers 3', 'Hidden state dimensions 512', 'Query/key dimensions 64', 'Activation function tanh', 'Optimizer Adam [35]', 'Discretization penalty and output-port exclusivity constraint η 0.01', 'PPO trust region ϵ 0.2', 'Elite pool size 20'. Additionally, it outlines the synthesis tool setup and constraints in Appendix C.2, including Listing 1 (SDC Constraints) and Listing 2 (Synthesis Script). |